Quobly maps silicon spin-qubit road to 2032 scaling

Quobly has outlined new research results on silicon spin-qubit quantum computing, spanning device operation on industrial silicon processes, automated calibration, processor simulation, and quantum error correction.

The Grenoble-based company presented several contributions at the American Physical Society's March Meeting in Denver. The work covers multiple layers needed for larger quantum processors, from semiconductor device behaviour to software tools for modelling performance.

Quobly's programme centres on silicon spin qubits fabricated using fully depleted silicon-on-insulator (FD-SOI). The company uses 300-millimetre wafers, the standard format for high-volume semiconductor manufacturing, and positions this alignment as a route to scaling.

"Scaling quantum computing requires advances across the entire technology stack, from semiconductor devices to control, simulation and error correction," said Tristan Meunier, Co-Founder and Chief Scientific Officer at Quobly.

Industrial devices

Several contributions focused on how silicon spin qubits behave when fabricated with FD-SOI in an industrial process. The work centres on qubit operation and characterisation, as well as supporting components needed to build larger-scale processors.

Quobly's device approach sits within what it calls QSOI, developed with STMicroelectronics. The platform uses FD-SOI to create spin qubits and place control transistors on the same chip. This combination affects architectural choices because control electronics and qubit arrays must operate together at cryogenic temperatures.

Studies presented at the meeting included cryogenic operation of FD-SOI quantum devices and the behaviour of quantum dots in the few-electron regime. Another thread covered wafer-level characterisation of qubit devices fabricated using industrial CMOS processes. Such methods support repeatability, yield, and process learning-constraints familiar from conventional chip development.

The research also included automated extraction of device parameters from Coulomb-diamond measurements, enabling statistical analysis across more devices than is typical with individually tuned laboratory samples. Quobly described the resulting data as a way to assess reproducibility and scaling prospects for silicon spin qubits built on industrial manufacturing lines.

Calibration challenge

A separate set of contributions addressed calibration and control, a major operational challenge across quantum computing platforms. As processors grow, each qubit adds tuning requirements, and the number of settings can rise quickly as arrays expand.

Quobly researchers described graph-based calibration methods intended to automate identification of qubit operating regimes and support device tuning. Automation is increasingly central in quantum engineering, since manual approaches do not scale to large qubit counts.

Simulation tools

Alongside hardware work, Quobly is developing simulation and benchmarking tools based on realistic hardware models. These include noise-aware simulations, pulse-level compilation workflows, and circuit benchmarking for silicon spin-qubit systems.

One contribution covered SpinPulse, which Quobly describes as a digital twin of silicon spin qubits. The framework uses tensor-network techniques to support larger-scale simulations of quantum algorithms. Quobly highlighted quantum phase estimation as one such algorithm, often discussed in the context of quantum chemistry research.

The March Meeting programme also listed a presentation on the SpinPulse library for transpilation and noise-accurate simulation of spin-qubit quantum computers, along with a quantum phase estimation toolbox. Quobly has also linked SpinPulse to a recent preprint and an open-source release.

Error correction

Quobly framed the results as part of a system-level approach spanning device physics through to error correction. Fault tolerance remains a central challenge in quantum computing, relying on quantum error correction schemes that use many physical qubits to represent fewer logical qubits with lower error rates.

In remarks at the meeting, Meunier set out an ambition to reach very large-scale systems over the next decade. "Our approach builds on silicon technologies that already manufacture billions of chips every year, providing a realistic path to industrial-scale quantum processors. Our roadmap targets systems scaling to millions of qubits by 2032, designed to integrate with future high-performance computing and data-center infrastructures," he said.

Staff presented the company's contributions across industrial silicon spin-qubit devices, automation and calibration, and simulation and benchmarking. Quobly said it will continue work on FD-SOI silicon spin-qubit devices, automated calibration methods, and modelling tools as it develops its roadmap towards much larger qubit arrays.